AMD Zen 6: More Cache for More Cores?

According to new rumors, AMD is planning to increase the L3 cache of its future Zen 6 processors. The goal would be to bring the cache to 48MB for each CCD (Compute Complex Die) equipped with 12 cores.

This cache increase would serve to maintain the same cache-to-core ratio that characterizes the current Zen 5 processors. By increasing the number of cores per CCD, AMD must necessarily also increase the cache to avoid performance bottlenecks.

AMD Ryzen, EPYC, and Threadripper processors based on Zen architecture are widely used in scenarios that benefit from a large cache, such as scientific computing, 3D rendering, and, increasingly, AI model inference.

For those evaluating on-premise deployments, there are trade-offs between cost, performance, and memory requirements that AI-RADAR helps quantify through analytical frameworks on /llm-onpremise.