Betting on density: Imec's new compass

Imec unveiled a roadmap that shifts the center of gravity of semiconductor progress. No longer just the linear dimension of the transistor, but cell density becomes the guiding parameter. It is a pragmatic redefinition of Moore's Law, which in recent years has shown the signs of aging of nanometric nodes. The announcement, part of the 2026 update, points to two decisive milestones: CFET transistors reaching industrial viability at 0.7nm and 0.3nm process nodes projected for 2038.

This perspective shift is not trivial. For decades we measured progress by gate length reduction. Imec, instead, puts the focus on how much space a complete logic cell occupies, signaling that miniaturization for its own sake gives way to engineering more attentive to 3D architecture and packaging. It’s the same logic that led to GAA (gate-all-around) transistors and now paves the way for CFETs, where n- and p-type transistors are stacked vertically to save area and cut interconnects.

CFET at 0.7nm: the thermodynamic tipping point

CFET (Complementary Field-Effect Transistor) devices are not a new concept in labs, but Imec’s roadmap sets a manufacturability horizon. At 0.7nm the stacked structure becomes competitive, offering a path to maintain scalability without incurring unmanageable leakage currents. The direct benefit for AI workloads? Energy efficiency per operation and higher compute density per square millimeter of silicon.

For those designing on-premise infrastructure for LLMs, the message is clear: future accelerators could integrate many more cores in the same package, with power consumption under control. Inference of ever-larger models, even in air-gapped or GDPR-regulated environments, will no longer be constrained by individual chip wattage. This shifts TCO calculations toward perhaps high initial CapEx but drastically cut energy OpEx.

The 0.3nm node: a 2038 horizon with today's implications

Projecting a roadmap so far out is an act of engineering faith, but Imec does it with good reason. The arrival of 0.3nm nodes in 2038 means the foundries' R&D pipeline remains robust, and that investments in EUV lithography and advanced materials will continue. Even if no CIO today bases a purchasing decision on a node fifteen years away, the signal is important: self-hosting AI compute capabilities are not at risk of becoming obsolete due to lack of hardware progress. On the contrary, the trajectory promises more capable, less power-hungry machines.

The real game, however, plays out in the medium term. Today's on-prem inference stacks rely on GPUs built on 5nm or 4nm nodes. Imagining a leap to 0.7nm with CFET architecture means having accelerators that can handle wider context windows and perform aggressive quantization without quality loss. Organizations currently evaluating hybrid or fully local deployments should monitor these evolutions: server and networking investment planning could benefit from less frequent refreshes if compute density keeps climbing at this pace.

Promise vs. reality: why it matters for on-premise adopters

Redefining Moore's Law around cell density is not just a marketing move. It’s the acknowledgment that value for intensive workloads – such as training and inference of Large Language Models – is measured in operations per watt and per unit of rack space. CFET transistors and 0.3nm nodes promise to squeeze more logic into the same thermal footprint, knocking down one of the main bottlenecks of self-hosting: heat management in enterprise data centers.

Of course, the challenges remain enormous. Manufacturing complexity will push development costs for new fabs to record levels, and per-transistor cost may not drop as in the past. Nevertheless, for organizations betting on data sovereignty and on control of their inference fleet, a long and ambitious roadmap like Imec's provides a stability anchor. It allows them to imagine local infrastructures that won't be quickly displaced by the cloud, and to build business cases where hardware ownership amortizes over very long innovation cycles.