AI capabilities are moving into edge devices, autonomous driving and robotics, with new SoCs, ASICs and frameworks designed for on-device inference and physical workloads. Declining token prices are putting pressure on general-purpose GPU economics and accelerating specialized silicon.
M3-Former combines static attributes and navigation intent encoded by an LLM with dynamic features, using a dual-granularity MoE and a steering-specific loss. On a Danish AIS dataset it reduces 4-hour ADE and FDE by 4.4% and 5.1% against the stronges...
d-Matrix presented an inference cost model at SEMICON Taiwan 2026. The point: if token prices fall while GPU depreciation, energy and memory bandwidth costs remain rigid, margins for compute capacity providers shrink. The pressure is structural and p...
Qualcomm details the next-generation Oryon CPU, Adreno GPU, and Hexagon NPU. The move confirms that local inference becomes a primary design constraint for client chips and a strategic option for organizations evaluating self-hosted deployments and d...
The new Apple A20 Pro SoC doubles the Neural Engine from 16 to 32 cores and, thanks to a 96-bit LPDDR5X bus on a 2nm process, reaches about 115 GB/s of memory bandwidth. A costly investment that signals Apple's strategic priority for local model exec...
Production of HyperAccel on Samsung's 4nm node signals dedicated LLM accelerators moving from experimentation to industrial supply logic. Tight capacity adds pressure on deliveries and wafer allocation. For self-hosted deployments, ASICs promise lowe...
SEMIFIVE has started producing its HyperAccel chips on Samsung's 4-nanometer node amid tightening production capacity. The company offers custom ASICs and LLM accelerators. The news highlights growing supply-chain pressure for inference workloads and...
Qwen has published an open-weight model derived from a 4B checkpoint and fine-tuned for driving. The full BF16 checkpoint is 9B. It signals Chinese labs pushing toward autonomous driving with open models, with implications for local inference, data s...
Arm brings together more than 80 partners to define common standards for robotics and physical AI. The Robotics Capability Framework introduces capability tiers similar to SAE levels, tying use cases to latency, compute placement, memory, power, and ...
