The Linux kernel is getting ready for RISC‑V 64‑bit processors with a core count never seen before on the open architecture. Overnight, right after the merge window closed, a patch was committed to the Git tree that, ahead of the Linux 7.2‑rc2 release, raises the default CPU limit for RISC‑V 64‑bit builds to 256 cores. It’s not a code rewrite, just a tweak in the kernel configuration: the parameter that tells the operating system how many cores it can manage out of the box without manual intervention.

The move, while technically discreet, says a lot. So far, server‑grade RISC‑V silicon has topped out at a few dozen cores; chips like StarFive’s JH7110 or T‑Head’s SG2042, though aimed at data centers, still offer relatively modest parallelism. With the new default, the kernel declares itself ready for much more ambitious hardware.

The RISC‑V open instruction set architecture is a key piece in any discussion about technological sovereignty. Unlike x86 and ARM, its ISA is free from proprietary licenses, letting manufacturers and end users build fully verifiable platforms without blind trust in third parties. Companies, research labs, and governments looking at on‑premise deployments of their infrastructure – including machine learning and inference workloads – see RISC‑V as a path to reduce reliance on external vendors.

In a scenario of local inference for Large Language Models, the prospect of RISC‑V servers with hundreds of cores naturally opens the way to CPU‑only execution. By leveraging vector computation parallelism, optimized runtime libraries, and quantization techniques, mid‑sized models can already run with acceptable performance. True, the hardware acceleration ecosystem comparable to CUDA or ROCm is still missing, and support for proprietary vector units remains fragmented. But the direction taken by the Linux kernel signals that the market is investing in many‑core RISC‑V chips destined to leave the lab.

The patch, signed by maintainer Palmer Dabbelt, adjusts the architecture configuration file (Kconfig), moving the NR_CPUS value from 128 to 256 for default builds. Kernel builders can still push the limit higher, but having such a high default is the first step to ensure everything works “out of the box” on new systems.

For those evaluating on‑premise inference stacks, the future availability of many‑core RISC‑V machines offers an additional option to diversify hardware and contain licensing costs in the medium term, with an eye on total TCO. The lack of a dedicated GPU acceleration framework, however, still forces hybrid designs or a strict focus on highly CPU‑optimized models.

With the merge into 7.2‑rc2, the 256‑core default is already live in the development branch and will land in the next stable release. The message to the ecosystem is clear: the software is ready, the silicon is coming.