Hot Chips 2026 reveals a shift toward specialized AI accelerators, from Google TPU 8t/8i and Intel Crescent Island to AMD Instinct MI450 and Micron's HBM capacity trade-offs. Compiler and platform changes increasingly target these new hardware paths.
Micron said at Hot Chips 2026 that HBM requires about three times the wafer area of DDR5 for the same capacity. The ratio won't improve with future generations. Each gigabyte of HBM in a datacenter GPU removes three gigabytes of conventional DRAM cap...
AMD has merged a new strict LLVM compiler target for the GFX1250 IP behind the Instinct MI450 accelerators. The change highlights the growing role of compiler toolchains in stable, reproducible AI infrastructure and in balancing compatibility with pe...
Enflame Technology's IPO puts its Tencent ties, deep losses and AI chip ambitions under the spotlight. The case exposes the tension between domestic hardware sovereignty and commercial sustainability, with implications for local AI infrastructure. A ...
Google presented its eighth-generation TPU family at Hot Chips 2026, with the TPU 8t for training and the TPU 8i for inference. It signals growing specialization in AI hardware and hyperscalers' push to reduce dependence on external suppliers.
The first stable release of the LLVM 23 series adds support for AMD Zen 6, NVIDIA Rigel, and partial C++26 coverage. For teams running on-premise AI stacks, the compiler is where new silicon becomes usable. The update strengthens a multi-vendor path ...
At Hot Chips 2026, details emerged on Intel Crescent Island, an AI accelerator with LPDDR5X configurations from 160 to 480 GB. The choice prioritizes memory capacity over raw compute: for inference on large LLMs, fewer GPUs may be sufficient, affecti...
A Modal hosting test with 8 B300s shows 92 tok/s in decode and $190 per million output tokens. The 1-bit variant on 8 A100s costs less per hour but triples the cost per token. The analysis reveals why hourly pricing is a misleading metric for LLM inf...
