From Google TPUs, HBM and RISC-V to AMD ROCm, LLVM targets, and Chinese GPU IPOs, the AI hardware and toolchain stack is rapidly specializing. Nvidia is also shifting advantage beyond raw GPU performance toward data-center traffic control.
MetaX reported a first-half profit, while China's AI GPU rival landscape remains divided. The result points to a domestic market maturing unevenly: vendor sustainability and integration with self-hosted stacks become key variables for organizations e...
SiFive's move into the data center market with BigSky signals a strategic shift: bringing RISC-V processors alongside the Nvidia ecosystem, with CUDA as the interface and enterprise Linux as the operating base. For AI infrastructure operators, this o...
Three signals from the semiconductor supply chain: Washington tries to steer South Korean investments, MediaTek enters Google's TPU landscape, Apple introduces a 2nm processor. For teams evaluating self-hosted LLMs, competition among accelerators and...
Nvidia is shifting its competitive edge beyond the GPU, toward intelligent traffic control in data center systems. Adding compute cycles is no longer enough: governing flows across accelerators, memory, and network becomes the lever for efficiency. A...
Micron said at Hot Chips 2026 that HBM requires about three times the wafer area of DDR5 for the same capacity. The ratio won't improve with future generations. Each gigabyte of HBM in a datacenter GPU removes three gigabytes of conventional DRAM cap...
AMD moves from ROCm 7.14 to ROCm 10.0 under the ROCm.AI name after a period of confusing release numbers split between stable branches and tech previews. For teams using AMD GPUs in self-hosted environments, a clear major version reduces uncertainty ...
AMD has merged a new strict LLVM compiler target for the GFX1250 IP behind the Instinct MI450 accelerators. The change highlights the growing role of compiler toolchains in stable, reproducible AI infrastructure and in balancing compatibility with pe...
Enflame Technology's IPO puts its Tencent ties, deep losses and AI chip ambitions under the spotlight. The case exposes the tension between domestic hardware sovereignty and commercial sustainability, with implications for local AI infrastructure. A ...
Google presented its eighth-generation TPU family at Hot Chips 2026, with the TPU 8t for training and the TPU 8i for inference. It signals growing specialization in AI hardware and hyperscalers' push to reduce dependence on external suppliers.
The first stable release of the LLVM 23 series adds support for AMD Zen 6, NVIDIA Rigel, and partial C++26 coverage. For teams running on-premise AI stacks, the compiler is where new silicon becomes usable. The update strengthens a multi-vendor path ...
