AMD has posted a series of patches to the Linux kernel mailing list, introducing support for a new CPU core type named "Low Power." The x86 topology code already distinguishes between "Performance" and "Efficiency" cores to handle hybrid architectures, but now the Santa Clara company is adding a third category, designed for ultra-low-power scenarios.

The technical background: why three core types matter

The Linux kernel has long been able to classify cores in a heterogeneous CPU, mainly to optimize scheduling on Intel processors with hybrid designs (P-cores and E-cores). The x86 architecture groups threads by performance level through a "topology class" mechanism, which influences how the operating system allocates workloads. The novelty of the AMD patches is the expansion of this scheme: not just two classes, but three, where the new "Low Power" tier represents cores with even lower consumption than Efficiency ones, presumably intended for background tasks or dynamic power-saving management.

What changes for on-premise workloads

The introduction of a third core class is more than a kernel hacker's detail. In server environments, where energy costs are a major TCO driver, the ability to offload lightweight operations to extremely low-wattage units could translate into significant savings. For those managing on-premise clusters, the prospect is twofold: on one hand, the adoption of future AMD processors with this technology might slash electricity bills without sacrificing peak performance; on the other, OS-level support is the prerequisite for scheduling to fully exploit CPU heterogeneity—something far from given, as early experiences with Intel hybrid chips demonstrated. It's the kind of evolution AI-RADAR tracks closely, because it influences deployment choices when evaluating hardware for local LLM inference or training.

The competitive landscape: AMD vs Intel on the efficiency battleground

AMD has yet to officially announce consumer or server processors with three core types, but the appearance of these patches is a clear signal that the company is laying the groundwork. Intel has already walked the hybrid path with Lakefield, Alder Lake, and Raptor Lake, achieving good efficiency results while also facing scheduling headaches on early Windows and Linux systems. AMD's move, if backed by solid software integration from the start, could leapfrog the competition in the race for energy optimization, especially in the server space with EPYC chips. It remains to be seen whether the "Low Power" cores will be an extreme variant of existing Zen designs or introduce a dedicated microarchitecture.

Beyond silicon: the importance of mature scheduling

The value of a hybrid architecture is not measured in transistors alone. What makes the real difference is the operating system's ability to orchestrate work across different cores without hurting responsiveness or creating bottlenecks. The AMD patches are another step in that direction: the code sent to kernel developers, still under review, modifies the ppin_init() function and other parts of the x86 topology to recognize the new type. If accepted, they will land in one of the next kernel releases, likely early enough to be ready when the hardware debuts. This choice signals maturity and could make future AMD hybrid platforms performant from day one, avoiding the teething problems seen elsewhere. For IT professionals planning infrastructure refreshes, it's a line item worth budgeting for.